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【英伟达NVIDIA-上海】招聘芯片功耗工程师 ASIC Power Engineer

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发表于 2018-3-12 09:36:16 | 显示全部楼层 |阅读模式
工作地点: 上海市浦东新区秋月路26号     
投递邮箱:heatherl@nvidia.com   

工作职责:
  • Create a methodology/algorithm toevaluate power efficiency on high-level (architecture) designs.
  • Support IP designers using thepower flow to do the power scrubbing work and improve their power efficiency onmicro-arch (ASIC) level.
  • Understand and perform block leveland chip-level power analysis.
  • Communicate/Cooperate with localand abroad teams with power-related projects.
  • Co-work with power ARCH team/IPteam to evaluate new low-power technologies and improve chip power efficiency.


任职资格:
  • MSEE/MSCS postgraduate.
  • Experience in ASICdesign/verification, low power knowledge is a strong plus.
  • Must be familiar with at least oneof the programming languages, C/C++ (preferred), Python, Perl.
  • Excellent English writing/speakingskills are desired.
  • Good communication skills.


工作地点: 上海市浦东新区秋月路26号      
投递邮箱:heatherl@nvidia.com   

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