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【英伟达NVIDIA上海】硬件社招职位(架构/设计/验证/SOC/功耗)

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发表于 2018-3-12 10:06:27 | 显示全部楼层 |阅读模式
本帖最后由 qingyou 于 2018-3-12 10:07 编辑

工作地点: 上海市浦东新区秋月路26号     
投递邮箱:heatherl@nvidia.com     

  • 高级CPU架构工程师Senior CPUArchitecture Engineer
  • 高级深度学习硬件架构工程师NVDLA Architecture Engineer
  • 高级芯片设计工程师(安全方向)Senior ASIC Design Engineer (Security)
  • 高级芯片设计工程师(视频方向)Senior ASIC Design Engineer(Video)
  • 高级芯片验证工程师Senior Verification Engineer
  • SOC设计工程师SOCDesign Engineer
  • 芯片设计工程师ASIC Design/Verification Engineer
  • 芯片验证工程师ASIC Verification Engineer(Clocks)
  • 芯片功耗工程师ASIC Power Engineer

高级CPU架构工程师Senior CPU Architecture Engineer

工作职责:
  • Architect NVIDIA's next generationof RISCV CPU
  • Co-work with software team toidentify architecture requirements
  • Evaluation of differentarchitecture solutions
  • Define architecture of the CPUcore and various hardware components surrounding the CPU, like local memory,interconnect and crypto accelerators
  • Validate the new architecture onCMOD

任职资格:
  • BS/MS in electrical/computerengineering and related.
  • 3+ years’ experience in hardwarearchitecture
  • Strong skills in C/C++
  • Solid understanding to computerarchitecture

加分项:
  • Project experiences of complex CPUarchitecture
  • Knowledge or project experiencesof RISCV CPU
  • Knowledge of project experienceson SystemC modeling
  • Broad understanding to computersecurity and crypro algorithms like AES/SHA/RSA/ECC
  • Fluent English (both written andspoken) and excellent communication skills
  • Demonstrated ability to workindependently as well as in a multi-disciplinary group environment

高级深度学习硬件架构工程师 Senior NVDLA Architecture Engineer

工作职责:
  • Buildingnext generation of NVDLA for both internal usage and open source
  • Workon Deep-Learning architecture, algorithms, and software development
  • Developfunction/performance/power models for NVDLA
  • Co-workwith other HW team to deliver high quality Deep-Learning processors.

任职资格:
  • MS/Ph.Din electrical/computer engineering and related.
  • 3+years strong experience in algorithm/architecture development in one or some ofthe following technologies: CPU, GPU, DSP, deep-learning processor, ImageProcessor.
  • Solidsoftware skills in C/C++

加分项:
  • Hardwaredesign or driver development background is a plus.
  • FluentEnglish (both written and spoken) and excellent communication skills
  • Demonstratedability to work independently as well as in a multi-disciplinary groupenvironment

高级芯片设计工程师(安全方向)Senior ASIC Design Engineer (Security)

工作职责:
  • Building NVIDIA's next generationof RISCV security CPU
  • Co-work with architect team todefine CPU architecture/micro-architecture
  • Design and verification of varioushardware modules including CPU core, interconnect, and various peripheralsincluding DMA, AES, SHA, RSA and ECC engines

任职资格:
  • BS/MS in electrical/computerengineering and related.
  • 3+ years’ experience in ASICdesign. Strong design/implementation skills in Verilog. Solid understanding intiming/power optimization skills of digital design

加分项:
  • Solid understanding to computerarchitecture
  • Project experiences of complex CPUarchitecture or micro-architecture design like out-of-order or dual-issue cores
  • Knowledge or project experiencesof RISCV CPU
  • Broad understanding to computersecurity and crypro algorithms like AES/SHA/RSA/ECC
  • Perl scripting skills isappreciated as a plus.
  • Fluent English (both written andspoken) and excellent communication skills
  • Demonstrated ability to workindependently as well as in a multi-disciplinary group environment

高级芯片设计工程师(视频方向)Senior ASIC Design Engineer (Video)

工作职责:
  • Building NVIDIA's next generationof video codec engines
  • Co-work with video architect todefine video architecture/micro-architecture
  • Design and verification of videohardware module.

任职资格:
  • BS/MS in electrical/computerengineering and related.
  • 3+ years ‘experience in ASIC design.Strong design/implementation skills in Verilog. Solid understanding intiming/power optimization skills of digital design

加分项:
  • Broad knowledge with video andimage processing techniques and with digital video compression standards suchas H.264, H265, VP9 and AV1 is a big plus.
  • Knowledge with computer visionalgorithms like optical flow and stereo is a plus.
  • Familiar with HLS tool, likeMentor Catapult
  • Perl scripting skills isappreciated as a plus.
  • Fluent English (both written andspoken) and excellent communication skills
  • Demonstrated ability to workindependently as well as in a multi-disciplinary group environment

高级芯片验证工程师Senior Verification Engineer

工作职责:
  • You will participate in theresearch of verification methodology to improve automation and productivity toproduce Nvidia’s new high-quality state of the art products.
  • Read IAS and design specs tounderstand the design requirement and build corresponding testplan. Review thetestplan with arch/design engineers.
  • You responses to build block/IP testbenchbased on UVM methodology.
  • The responsibilities includesbuilding test run and regression flow. Triage failures in regression and helpdesigner root cause the bug.
  • Work includes Build variousmetrics (passing rate, functional coverage, etc) and monitor its health.
  • Take SOC verification on fullchiptest environment for IPs
  • Analyse functional/code coverageresult and identify the coverage holes. Work with design engineer to improvethe coverage score.
  • Deploy the advanced verificationmethodology and infrastructure of the SOC/IP

任职资格:
  • BS / MS in electrical / computerengineering and related.
  • 3+ years (MS) or 5+ years (BS)working experience.
  • Familiar with advance verificationmethodology (UVM, VMM, OVM, etc), tools and flow
  • Fully experienced verificationflow, including testplan, test, coverage model, testbench, BFM modeling.
  • Deep understanding in Verilog andHVL (High-level Verification Language)

加分项:
  • Strong programming skills in Perland C/C++is plus
  • Having good arch/design experienceis big plus.
  • At least good at one of the scriptprograming lanange : Perl, Shell, Ruby, Python, etc.
  • Fluent English (both written andspoken) and excellent communication skills
  • Proven ability to workindependently as well as in a multi-disciplinary group environment
  • Strong analytical skills

芯片设计工程师ASIC Design/Verification Engineer

工作职责:
  • Micro-architecture definition forSystem-level modules (Reset, Fuse, Strap, In-silicon measurement, Floorsweep,etc…)
  • RTL design, synthesis, timing andsilicon bring-up
  • Unit-level and System-levelverification
  • Chip level integration

任职资格:
  • BS / MS in electrical / computerengineering and related.
  • Familiar with verificationmethodology, tools and flow
  • Understand frontend ASIC designflow including RTL design, synthesis and timing analysis
  • Excellent analytical andproblem-solving skills

加分项:
  • Broad knowledge with Videotechniques, SOC architecture and Computer architecture is a big plus
  • Strong programming skills in C/C++and Perl is appreciated as a plus
  • Fluent English (both written andspoken) and excellent communication skills
  • Good team work spirit, easy tocooperate with team members

芯片验证工程师ASIC Verification Engineer (Clocks)

工作职责:
  • Module-level or Chip-level logicdesign, synthesis, timing constraints, and silicon bring-up.
  • Module-level or Chip-levelverification, both for function and test mode
  • Methodology or Flow developmentfor above tasks.

任职资格:
  • BS / MS in electrical / computerengineering and related.
  • Understand ASICdesign/verification/implementation flow
  • Familiar with design/verificationlanguages as C/C++, Verilog or VHDL
  • Know industrial standard scriptinglanguage as Perl, or Python, TCL, Ruby
  • Excellent analytical andproblem-solving skills
  • Fluent English and excellentcommunication skills
  • Good team work spirit, easy tocooperate with team members

加分项:
  • Understand JTAG, DFT, or OCC is a plus
SOC设计工程师SOC Design Engineer

工作职责:
  • Responsible for creating complexGPUs and SOCs and interface directly with unit-level, Physical Design, CAD,Package Design, Software, DFT and other teams
  • Get involved with defining andcreating methodologies that create more efficient and flexible SOCs in future.

任职资格:
  • BS or MS (preferred) in EE or CS
  • Understand frontend ASICdesign/verification/implementation flow
  • Excellent analytical andproblem-solving skills
  • Strong coding skills in Perl orother industry-standard scripting languages
  • Fluent English (both written andspoken) and excellent communication skills to interface with many groups andbuild consensus
  • Good team work spirit, easy tocooperate with team members

加分项:
  • Prior experience in implementingSystem-On-Chip is a plus
  • Prior experience in RTL build anddesign automation is a plus

芯片功耗工程师ASIC Power Engineer

工作职责:
  • Create a methodology/algorithm toevaluate power efficiency on high-level (architecture) designs.
  • Support IP designers using thepower flow to do the power scrubbing work and improve their power efficiency onmicro-arch (ASIC) level.
  • Understand and perform block leveland chip-level power analysis.
  • Communicate/Cooperate with localand abroad teams with power-related projects.
  • Co-work with power ARCH team/IPteam to evaluate new low-power technologies and improve chip power efficiency.

任职资格:
  • MSEE/MSCS postgraduate.
  • Experience in ASICdesign/verification, low power knowledge is a strong plus.
  • Must be familiar with at least oneof the programming languages, C/C++ (preferred), Python, Perl.
  • Excellent English writing/speakingskills are desired.
  • Good communication skills.

工作地点: 上海市浦东新区秋月路26号      
投递邮箱:heatherl@nvidia.com   

发表于 2018-6-21 16:45:49 | 显示全部楼层
感激涕零,谢谢楼主的好贴












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